1. Field of the Invention
The present invention relates to a microcomputer which is installed in electronic equipment such as a video cassette recorder, for example, and has a low current consumption mode and a normal operation mode.
2. Description of Related Art
FIGS. 9 and 10 are block diagrams showing a configuration of a conventional microcomputer disclosed in Japanese patent application laid-open No. 9-191569/1997, for example: FIG. 9 shows an operation in the low current consumption mode; and FIG. 10 shows an operation in the normal operation mode.
In these figures, the reference numeral 1 designates a microcomputer installed in electronic equipment or the like such as a video cassette recorder; 2 designates an oscillator with an oscillation frequency of the main clock 2a; 3 designates an oscillator with an oscillation frequency of the sub-clock 3a; 4 designates a CPU; 5 designates a timing generator for generating an operation clock signal of the CPU 4 in response to the oscillation frequency of the output signal from the oscillator 2 or 3; 6 designates peripheral hardware for switching the mode of the microcomputer 1 from the low current consumption mode to the normal operation mode in response to the detection of an edge of a pulse signal 8 from a remote controller.
Next, the operation of the conventional microcomputer will be described.
In FIGS. 9 and 10, to reduce useless power consumption during power down, the microcomputer 1 installed in the electronic equipment or the like includes the oscillator 3 of the sub-clock 3a for small current consumption in addition to the oscillator 2 of the main clock 2a. The microcomputer changes its operation mode from the low current consumption mode using the sub-clock 3a as the system clock to the normal operation mode using the main clock 2a as the system clock in response to an event.
In the low current consumption mode as shown in FIG. 9, the shadowed oscillator 2, CPU 4 and timing generator 5 are halted, with only the peripheral hardware 6 being operable according to the sub-clock 3a based on the oscillator 3.
When the pulse signal 8 associated with an external event is input from the remote controller to the peripheral hardware 6 in the low current consumption mode, the peripheral hardware 6, detecting an edge of the pulse signal 8, activates the oscillator 2 of the main clock 2a, and activates the timing generator 5 to generate the operation clock signal of the CPU 4, thereby bringing the CPU 4 into operation.
Thus, the peripheral hardware 6 switches the operation mode from the low current consumption mode using the sub-clock 3a as the system clock to the normal operation mode using the main clock 2a as the system clock in response to the detection of the edge of the pulse signal 8 from the remote controller.
In the conventional microcomputer with the foregoing configuration, the peripheral hardware 6 switches the operation mode from the low current consumption mode to the normal operation mode in response to the detection of the pulse signal 8 from the remote controller. This offers a problem of accidentally changing the mode to the normal operation mode because the peripheral hardware 6 can erroneously detect the noise or the like supplied thereto as the edge of the pulse signal 8, thereby increasing the power consumption.
The present invention is implemented to solve the foregoing problem. It is therefore an object of the present invention to provide a microcomputer capable of reducing the power consumption by making more effective use of the low current consumption mode by improving a mode transition identification rate.
According to a first aspect of the present invention, there is provided a microcomputer comprising: an edge detector for detecting a first edge and a second edge of a pulse signal supplied from a remote controller; effective interval setting means for setting an effective interval after a predetermined time period has elapsed from the time the edge detector detects the first edge; and interrupt control means for generating an interrupt signal for changing an operation mode from a low current consumption mode to a normal operation mode when the edge detector detects the second edge during the effective interval.
Here, the effective interval setting means may comprises a plurality of reloadable registers for holding count values corresponding to the predetermined time period and to the effective interval; and a counter for counting each of the count values held in the reloadable registers to determine the predetermined time period and the effective interval.
The effective interval setting means may comprises a counter for counting a count value according to count sources corresponding to the predetermined time period and the effective interval, and for setting the predetermined time period and effective interval in response to an overflow of the counter.
According to a second aspect of the present invention, there is provided a microcomputer comprising: an edge detector for detecting a first edge, a second edge and a third edge of a pulse signal supplied from a remote controller; effective interval setting means for setting a first effective interval after a first predetermined time period has elapsed from the time the edge detector detects the first edge, and for setting a second effective interval after a second predetermined time period has elapsed from the time the edge detector detects the second edge during the first effective interval; and interrupt control means for generating an interrupt signal for changing an operation mode from a low current consumption mode to a normal operation mode when the edge detector detects the third edge during the second effective interval.
Here, the effective interval setting means may comprises a plurality of reloadable registers for holding count values corresponding to the first and second predetermined time periods and to the first and second effective intervals; and a counter for counting each of the count values held in the reloadable registers to determine the first and second predetermined time periods and the first and second effective intervals.
The effective interval setting means may comprise a counter for counting a count value according to count sources corresponding to the first and second predetermined time periods and to the first and effective intervals, and for setting the first and second predetermined time periods and the first and second effective intervals in response to an overflow of the counter.